Proof-Carrying Arithmetic: Hardware-Native PQ Primitives with Built-in Computation Integrity

Define a primitive interface where low-level arithmetic kernels (e.g., Barrett reduction, butterfly units, modular multiplications) output short algebraic proofs or message authentication codes (MACs) that can be verified inline during cryptographic operations. Provide an ISA extension and FPGA/ASIC reference implementation (RISC-V coprocessor style) enabling proof generation and verification with pipeline-friendly instructions. Unlike existing fault detection methods relying on recomputation or operand transformations, this approach makes the arithmetic attesting to itself—proof-carrying arithmetic—allowing KEMs to refuse outputs when proofs fail. This turns low-level countermeasures into a security property of the primitive. The research builds on fault models, hardware optimizations, side-channel-aware shuffling, and the need for cryptographic soundness of computation. The result is constant-time, high-throughput accelerators with cryptographically checkable outputs, providing strong defense against fault injection and oracle creation attacks without prohibitive recomputation overhead. The impact is a new class of hardware-native PQ primitives and ISAs that make side-channel and fault resilience first-class, provable properties rather than implementation afterthoughts.

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